PMOS vs NMOS

PMOS vs NMOS

The advantages of n-channel MOSFET’s over p-channel MOSFET’s and vice versa have been explained in detail. Even the problems that NMOS faces in device processing and oxidation have also been explained.

n-channel MOSFETs have some inherent performance advantages over p-channel MOSFET’s. The mobility of electrons, which are carriers in the case of an n-channel device, is about two times greater than that of holes, which are the carriers in the p-channel device. Thus an n-channel device is faster than a p-channel device. However, PMOS circuits have following advantages

• PMOS technology is highly controllable.
• It is a low cost process.
• It has good yield and high noise immunity.

In addition to inherent fast speed properly, NMOS device also have following advantages.

• Since electron mobility is twice (say) that of hole mobility, an n-channel device will have one-half the on-resistance or impedance of an equivalent p-channel device with the same geometry and under the same operating conditions. Thus n-channel transistors need only halt the size of p-channel devices to achieve the same impedance. Therefore, n-channel ICs can be smaller for the same complexity or, even more important, they can be more complex with no increase in silicon area.
• NMOS circuits offer a speed advantage over PMOS due to smaller junction areas. Since the operating speed of an MOS IC is largely limited by internal RC time constants and capacitance of diode is directly proportional to its size, an n-channel junction can have smaller capacitance. This, in turn, improves its speed.

Problems of NMOS

1. The n-channel device has following problems in the device processing. Most of the mobile contaminants are positively charged. Since NMOS operates with the gate positively based with respect to the substrate, these ions collect along the oxide-silicon interface. This charge causes a shift in V_Th. Also, there is fixed positive charge at the Si-SiO₂ interface resulting from various steps of the manufacturing process. This also shifts the threshold voltage. Both these charges have tendency to make the device normally on. These two charges exist in PMOS device too, but the positive ions are pulled to the AI-S1O₂ interlace by the negative bias applied to gate. There, they cannot affect the device threshold severely.
2. Another problem with NMOS device occurs during the oxidation of silicon which takes place at the Si-SiO2 interface. No real abrupt change occurs between silicon and Si0₂; rather there is a transition zone. This transition zone contains positively charged Silicon atoms which increase the absolute magnitude of the threshold voltage for a p-channel device and decrease the absolute magnitude of the threshold voltage for an n-channel device. This means it is difficult to make an n-channel device that is off at zero gate voltage. This is why it is more difficult to make an n-channel device than a p-channel device.